Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* User Guide

ID 683527
Date 10/19/2021

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Document Table of Contents

2.7. Running the Design Example Application

  1. Navigate to ./software/user/example under the design example directory.
  2. Compile the design example application:
    $ make
  3. Run the test:

    $ sudo ./intel_fpga_pcie_link_test

    You can run the Intel® FPGA IP PCIe* link test in manual or automatic mode.

    • In automatic mode, the application automatically selects the device. The test selects the Intel® Stratix® 10 PCIe* device with the lowest BDF by matching the Vendor ID. The test also selects the lowest available BAR.
    • In manual mode, the test queries you for the bus, device, and function number and BAR.
    For the Intel® Stratix® 10-GX Development Kit, you can determine the BDF by typing the following command:

    $ lspci -d 1172

  4. Here is a sample transcript for manual mode: