Visible to Intel only — GUID: pix1507305319155
Ixiasoft
Visible to Intel only — GUID: pix1507305319155
Ixiasoft
A.2. PCIe Link Inspector Overview
The following figure provides an overview of the debug capability available when you enable all of the options on the Configuration, Debug and Extension Option tab of the Intel L-/H-Tile Avalon-ST for PCI Express IP component GUI.
As this figure illustrates, the PCIe* Link (pli*) commands provide access to the following registers:
- The PCI Express* Configuration Space registers
- LTSSM monitor registers
- ATX PLL dynamic partial reconfiguration I/O (DPRIO) registers from the dynamic reconfiguration interface
- fPLL DPRIO registers from the dynamic reconfiguration interface
- Native PHY DPRIO registers from the dynamic reconfiguration interface
The NPDME commands (currently called adme*_) provide access to the following registers
- ATX PLL DPRIO registers from the ATX PLL NPDME interface
- fPLL DPRIO registers from the fPLL NPDME interface
- Native PHY DPRIO registers from the Native PHY NPDME interface
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