Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* User Guide

ID 683527
Date 10/19/2021

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Document Table of Contents

3. Block and Interface Descriptions

The Intel L-/H-Tile Avalon-MM+ for PCI Express IP consists of:
  • Modules, implemented in soft logic, that perform Avalon-MM functions.
  • A PCIe Hard IP that implements the Transaction, Data Link, and Physical layers required by the PCI Express protocol.