1. Introduction 2. Quick Start Guide 3. Block and Interface Descriptions 4. Parameters 5. Designing with the IP Core 6. Registers 7. Design Example and Testbench A. Troubleshooting and Observing the Link B. Avalon-MM IP Variants Comparison C. Root Port BFM D. BFM Procedures and Functions E. Root Port Enumeration F. Document Revision History for Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* User Guide
2.1. Design Components 2.2. Directory Structure 2.3. Generating the Design Example 2.4. Simulating the Design Example 2.5. Compiling the Design Example and Programming the Device 2.6. Installing the Linux Kernel Driver 2.7. Running the Design Example Application 2.8. Ensuring the Design Example Meets Timing Requirements
6.1.1. Register Access Definitions 6.1.2. PCI Configuration Header Registers 6.1.3. PCI Express Capability Structures 6.1.4. Intel Defined VSEC Capability Header 6.1.5. Uncorrectable Internal Error Status Register 6.1.6. Uncorrectable Internal Error Mask Register 6.1.7. Correctable Internal Error Status Register 6.1.8. Correctable Internal Error Mask Register
D.1. ebfm_barwr Procedure D.2. ebfm_barwr_imm Procedure D.3. ebfm_barrd_wait Procedure D.4. ebfm_barrd_nowt Procedure D.5. ebfm_cfgwr_imm_wait Procedure D.6. ebfm_cfgwr_imm_nowt Procedure D.7. ebfm_cfgrd_wait Procedure D.8. ebfm_cfgrd_nowt Procedure D.9. BFM Configuration Procedures D.10. BFM Shared Memory Access Procedures D.11. BFM Log and Message Procedures D.12. Verilog HDL Formatting Functions
22.214.171.124. Using the Traffic Checker (BAS Example Design Only)
To use the Traffic Checker, the host software must follow the following steps:
- Allocate a block of memory in PCIe space and initialize the memory with sequential dwords.
- Program one of the windows in the Address Mapper to point to the block of memory allocated in step 1.
Steps 1 and 2 can be done by running the Traffic Generator as described in the topic "Using the Traffic Generator".
- Set the Traffic Checker’s Read Address register to point to the base of window selected in step 2.
- Set the Traffic Checker’s Read Count to the size of the block of memory allocated and initialized in step 1 (or 1MB if that area is larger than 1MB).
- Write to the Traffic Checker’s Read Control register to:
- Set the target_size to the size of the block of memory.
- Set the transfer size to the desired size, e.g. 512 bytes.
- Set the write_enable bit to start traffic generation.
- Read the Traffic Checker’s Read Count register to check that the desired number of transfers have occurred.
- Read the Traffic Checker’s Error register to check that no error occurred.
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