Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* User Guide

ID 683527
Date 10/19/2021

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Document Table of Contents

4. Parameters

This chapter provides a reference for all the parameters of the Intel L-/H-Tile Avalon-MM+ for PCI Express IP core.
Table 34.  Design Environment ParameterStarting in Intel® Quartus® Prime 18.0, there is a new parameter Design Environment in the parameters editor window.




Design Environment



Identifies the environment that the IP is in.

  • The Standalone environment refers to the IP being in a standalone state where all its interfaces are exported.
  • The System environment refers to the IP being instantiated in a Platform Designer system.
Table 35.  System Settings




Application Interface Type

Avalon® -MM

By default, the interface to the Application Layer is set to Avalon® -MM.

Hard IP Mode

By default, the Hard IP mode is set to Gen3 x16, with a 512-bit interface to the Application Layer running at 250 MHz.

Port type

Native Endpoint

Root Port

Specifies the port type.

The Endpoint stores parameters in the Type 0 Configuration Space. The Root Port stores parameters in the Type 1 Configuration Space.

Note: Root Port mode is not available in the 18.0 release of Intel® Quartus® Prime Pro Edition.