Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* User Guide

ID 683527
Date 10/19/2021

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Document Table of Contents Read Data Mover Avalon-MM Write Master and Conduit

Table 10.  Read Data Mover Avalon-MM Write Master and Conduit Interface
Signal Name Direction Description
rddm_pfnum_o[<PFNUM_WIDTH>-1:0] Output Avalon® conduit showing function number.
rddm_waitrequest_i Input

Standard Avalon® -MM Write Master interface. For details, refer to the Avalon® Interface Specifications.

WaitRequest Allowance parameter for this interface is 16.

rddm_write_o Output
rddm_address_o[63:0] Output
rddm_burstcount_o[3:0] Output
rddm_byteenable_o[63:0] Output
rddm_writedata_o[511:0] Output
Note: PFNUM_WIDTH is the logarithm in base 2 of the number of Physical Functions (rounded up to the next integer).