3.2. Interface Descriptions
- High performance bursting master and slave Avalon®-MM interfaces to translate between PCIe TLPs and Avalon® -MM memory-mapped reads and writes
- Read and Write Data Movers to transfer large blocks of data
- Standard PCIe serial interface to transfer data over the PCIe link
- System interfaces for interrupts, clocking, reset
- Optional reconfiguration interface to dynamically change the value of Configuration Space registers at run-time
- Optional status interface for debug
p = number of bits to address all the Functions.
m = Bursting Master address bus width.
s = Bursting Slave address bus width.
Read Data Mover (RDDM) interface: This interface transfers DMA data from the PCIe* system memory to the memory in Avalon® -MM address space.
Write Data Mover (WRDM) interface: This interface transfers DMA data from the memory in Avalon® -MM address space to the PCIe* system memory.
Bursting Master (BAM) interface: This interface provides host access to the registers and memory in Avalon® -MM address space. The Busting Master module converts PCIe Memory Reads and Writes to Avalon® -MM Reads and Writes.
Bursting Slave (BAS) interface: This interface allows the user application in the FPGA to access the PCIe* system memory. The Bursting Slave module converts Avalon® -MM Reads and Writes to PCIe Memory Reads and Writes.
The modular design of the Intel L-/H-Tile Avalon-MM+ for PCI Express IP lets you enable just the interfaces required for your application.
Avalon-MM Interface Summary
Clocks and Resets
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