Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 3/01/2022
Public
Download
Document Table of Contents

4.8. Supported PHYs

You can connect the LL 10GbE MAC IP core to a PHY IP core using XGMII, GMII, or MII interfaces.

Table 18.  Supported PHYs
Operating Mode PHY
10G 10GBASE-R PHY, XAUI PHY
1G/10G 10GBASE-KR or 1G/10G PHY
10M/100M/1G/10G
1G/2.5G 1G/2.5G/10G Multi-rate Ethernet PHY
1G/2.5G/10G
10M/100M/1G/2.5G 1G/2.5G/10G Multi-rate Ethernet PHY (with SGMII bridge enabled)
10M/100M/1G/2.5G/10G
10M/100M/1G/2.5G/5G/10G 1G/2.5G/5G/10G Multi-rate Ethernet PHY

To connect the MAC IP core to 64-bit PHYs, ensure that you enable the Use legacy Ethernet 10G MAC XGMII Interface option.