Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 3/01/2022
Public
Document Table of Contents

4.5.3. Address Checking

The MAC RX can accept frames with the following address types:

  • Unicast address—bit 0 of the destination address is 0.
  • Multicast address—bit 0 of the destination address is 1.
  • Broadcast address—all 48 bits of the destination address are 1.

The MAC RX always accepts broadcast frames. By default, the MAC RX also receives all unicast and multicast frames unless configured otherwise in the EN_ALLUCAST and EN_ALLMCAST bits of the rx_frame_control register.

When the EN_ALLUCAST bit is set to 0, the MAC RX filters unicast frames received. The MAC RX accepts only unicast frames with a destination address that matches the primary MAC address specified in the primary_mac_addr0 and primary_mac_addr1 registers. If any of the supplementary address bits are set to 1 (EN_SUPP0/1/2/3 in the rx_frame_control register), the MAC RX also checks the destination address against the supplementary addresses in the rx_frame_spaddr*_* registers.

When the EN_ALLMCAST bit is set to 0, the MAC RX drops all multicast frames. This condition does not apply to global multicast pause frames.

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