6.5. Avalon® Memory-Mapped Interface Programming Signals
|csr_address||In||10/2|| Use this bus to specify the register address to read from or write to.
The width is 13 bits when you enable the Use Legacy Ethernet 10G MAC Avalon® memory-mapped interface option.
|csr_read||In||1||Assert this signal to request a read.|
|csr_readdata||Out||32||Data read from the specified register. The data is valid when thecsr_waitrequest signal is deasserted.|
|csr_write||In||1||Assert this signal to request a write.|
|csr_writedata||In||32||Data to be written to the specified register. The data is written when the csr_waitrequest signal is deasserted.|
When asserted, this signal indicates that the MAC IP core is busy and not ready to accept any read or write requests.
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