Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 3/01/2022
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1.5.1. Resource Utilization

The estimated resource utilization for all operating modes are obtained by compiling the LL Ethernet 10G MAC Intel® FPGA IP core with the Intel® Quartus® Prime software targeting on Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 GX devices. These estimates are generated by the fitter, excluding the virtual I/Os.

Table 7.  Resource Utilization for LL Ethernet 10G MAC for Intel® Stratix® 10 Devices
MAC Settings ALMs ALUTs Logic Registers Memory Block (M20K)
Operating Mode Enabled Options
10G None. 2,000 2,700 2,900 0
10G Memory-based statistics counters. 2,700 3,600 4,300 4
1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

3,500 4,300 5,900 4
1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

Timestamping. Time of day: 96b and 64b.

7,000 8,100 13,100 19
1G/2.5G/10G

Supplementary addresses.

Memory-based statistics counters.

3,600 4,500 6,200 4
10M/100M/1G/2.5G/5G/10G (USXGMII)

Supplementary addresses.

Memory-based statistics counters.

3,000 4,200 5,100 4
10M/100M/1G/ 2.5G/5G/10G (USXGMII)

Supplementary addresses.

Memory-based statistics counters.

Timestamping.

Time of day: 96b and 64b. 5,800 7,800 10,700 21
Time of day: 96b 5,400 7,100 9,800 20
Time of day format: 64b 4,800 6,300 8,900 17
10M/100M/1G/10G Memory-based statistics counters. 3,400 4,400 5,500 4
10M/100M/1G/10G

Memory-based statistics counters.

Timestamping.

Time of day: 96b and 64b. 6,800 8,300 12,100 17
Time of day: 96b 6,300 7,700 11,000 17
Time of day format: 64b 5,600 6,700 10,000 13
10M/100M/1G/10G All options enabled except the options to maintain compatibility with the legacy Ethernet 10G MAC. 7,200 8,600 12,400 27
10M/100M/1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

3,500 4,600 6,100 4
10M/100M/1G/2.5G/10G

Supplementary addresses.

Memory-based statistics counters.

3,600 4,800 6,800 4
Table 8.  Resource Utilization for LL Ethernet 10G MAC for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
MAC Settings ALMs ALUTs Logic Registers Memory Block (M20K)
Operating Mode Enabled Options
10G None. 1,600 2,400 2,800 0
10G Memory-based statistics counters. 2,400 3,300 4,000 4
1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

2,700 4,100 5,400 5
1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

Timestamping. Time of day: 96b and 64b.

5,500 8,100 13,300 22
1G/2.5G/10G

Supplementary addresses.

Memory-based statistics counters.

2,900 4,200 5,800 4
10M/100M/1G/2.5G/5G/10G (USXGMII)

Supplementary addresses.

Memory-based statistics counters.

2,400 3,900 4,700 4
10M/100M/1G/10G Memory-based statistics counters. 2,600 4,000 5,200 4
10M/100M/1G/10G

Timestamping.

Memory-based statistics counters.

Time of day: 96b and 64b. 5,000 7,600 13,000 21
Time of day: 96b 4,700 7,000 11,800 20
Time of day format: 64b 4,200 6,300 10,700 17
10M/100M/1G/10G All options enabled except the options to maintain compatibility with the legacy Ethernet 10G MAC. 5,400 7,900 13,300 27
10M/100M/1G/2.5G

Supplementary addresses.

Memory-based statistics counters.

2,900 4,300 5,700 5
10M/100M/1G/2.5G/10G

Supplementary addresses.

Memory-based statistics counters.

3,000 4,400 6,000 4