Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 3/01/2022
Public
Document Table of Contents

4.4.3. CRC-32 Insertion

By default, the MAC TX computes and inserts CRC-32 checksum into TX frames. The MAC TX computes the CRC-32 checksum over frame bytes that include the source address, destination address, length, data, and padding bytes. The computation excludes the preamble and SFD bytes. The MAC TX then inserts the CRC-32 checksum into the TX frame. Bit 31st of the checksum occupies the least significant bit of the first byte in the CRC field.

You can disable this function by setting the tx_crc_control[1] register bit to 0.

The following figure shows the timing diagram on the Avalon® streaming data interfaces where CRC insertion is enabled on transmit and CRC removal is disabled on receive. The frame from the client is without CRC-32 checksum. The MAC TX inserts the CRC-32 checksum (4EB00AF4) into the frame. The frame is then looped back to the RX datapath with the CRC-32 checksum.

Figure 11.  Avalon® Streaming TX and RX Interfaces with CRC Insertion Enabled


The following figure shows the timing diagram on the Avalon® streaming data interfaces where CRC insertion is disabled on transmit and CRC removal is disabled on receive. The MAC TX receives the frame from the client with a CRC-32 checksum (4EB00AF4). The frame with the same CRC-32 checksum is then looped back to the RX datapath.

Figure 12.  Avalon® Streaming TX and RX Interface with CRC Insertion Disabled


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