Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 3/01/2022
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4.5.7. Overflow Handling

When an overflow occurs on the client side, the client can backpressure the Avalon® streaming receive interface by deasserting the avalon_st_rx_ready signal. If an overflow occurs, the MAC RX sets the error bit, avalon_st_rx_error[5], to 1 to indicate an overflow. The MAC RX drops subsequent frames if the overflow condition persists. The MAC RX then continues to receive data when the overflow condition ceases.