2.2.4. SDM Segment
The hard memory NoC on the bottom edge of the device also has a segment that spans the Secure Device Manager (SDM). There is no connection between the SDM and the hard memory NoC, and all signals from the SDM bypass the hard memory NoC. This NoC segment spans one clock sector and consists of the following:
- One AXI4 initiator on the FPGA fabric side.
- A switch that transfers packets laterally along the hard memory NoC and connects to the AXI4 initiator.