E-tile Hard IP Intel® Agilex™ Design Example User Guide: Ethernet, E-tile CPRI PHY and Dynamic Reconfiguration

ID 683860
Date 12/11/2021
Public

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2.1.6.2. 100GE MAC+PCS with Optional (528,514) RS-FEC or (544,514) RS-FEC and Adaptation Flow Hardware Design Example

This hardware design example enables internal serial loopback mode by default. To run the hardware design with external loopback mode, select Enable adaptation load soft IP in the parameter editor before generating the design example.

To turn on the System Console and test the hardware design example, follow these steps:

  1. After the hardware design example is configured on the Intel® Agilex™ device, in the Intel® Quartus® Prime Pro Edition software, on the Tools menu, click System Debugging Tools > System Console.
  2. In the Tcl Console pane, type cd hwtest to change directory to <design_example_dir>/hardware_test_design/hwtest.
  3. Type source main.tcl to open a connection to the JTAG master.
  4. You can use the following design example commands to configure the 100GE hardware design example test with internal serial loopback mode. For example, in the system console, type run_test and press Enter.

    • run_test 1/run_test_pam4 2: To run hardware design example tests.
    • start_pma_init_adaptation 1/start_pma_02_init_adaptation 2: To perform PMA adaptation.
    • chkphy_status: Displays the clock frequencies and PHY lock status.
    • chkmac_stats: Displays the values in the MAC statistics counters.
    • clear_all_stats: Clears the IP core statistics counters.
    • start_pkt_gen: Starts the packet generator.
    • stop_pkt_gen: Stops the packet generator.
    • loop_on 1/loop_on_pam4 2: Turns on internal serial loopback.
    • loop_off: Turns off internal serial loopback.
    • reg_read <addr>: Returns the IP core register value at <addr>. Example, to read TX datapath PCS ready register, type reg_read 0x322.
    • reg_write <addr> <data>: Writes <data> to the IP core register at address <addr>. Example, to initiate soft reset on RX PCS, type reg_write 0x310 0x0004>
    • chk_init_adaptation_status 1/chk_init_adaptation_status02 2: Check for PAM4 PMA adaptation status.
  5. Optional step: To run the MAC+PCS with (528,514) RS-FEC or (544, 514) RS-FEC and PMA adaptation design example in external loopback mode, open hardware_test_design/hwtest/main.tcl file and uncomment start_pma_init_adaptation 1/start_pma_02_init_adaptation 2 command.

    Make sure the Enable adaptation load soft IP is selected and the PMA adaptation Select is set to:

    • NRZ_28Gbps_LR, NRZ_28Gbps_VSR, or NRZ_10Gbps before generating the design example1
    • PAM4_56Gbps_LR or PAM4_56Gbps_VSR before generating the design example2
  6. Disable the internal serial loopback mode by using loop_off command.

    You can use the following design example commands to configure the 100GE hardware design example test with external loopback mode.

    • start_pma_init_adaptation 1/start_pma_02_init_adaptation_ex 2: Performs PMA adaptation on external loopback or external devices connection tests.
    • start_pma_anlg_rst03 1/start_pma_anlg_02 2: Performs NRZ transceiver PMA reset.
    • init_adaptation_16_NoPrbsNoLdEL03 1/init_adaptation_16_NoPrbsNoLdELCntPC02 2: Performs NRZ PMA adaptation.
      Important: All the values set in this design example are tested with Intel Agilex F-Series Transceiver-SoC Development Kit . You may need to customize the PMA adaptation configuration values if you are running this design example on boards other than the Intel Agilex F-Series Transceiver-SoC Development Kit .
    • chk_init_adaptation_status 1/chk_init_adaptation_status_02 2: Checks for PAM4 PMA adaptation status.
    • ld_rcp: Loads PMA configuration settings based on the selection set in the Select a PMA configuration to load or store in the parameter editor.
      Important: All the values set in this design example are tested with Intel Agilex F-Series Transceiver-SoC Development Kit . You may need to customize the PMA adaptation configuration values if you are running this design example on boards other than the Intel Agilex F-Series Transceiver-SoC Development Kit .
    • chk_rcp_status 1: Checks PMA configuration settings load status and retry if necessary.
1 Applicable for 100GE MAC+PCS with optional (528,514) RS-FEC and PMA adaptation hardware design example.
2 Applicable for 100GE MAC+PCS with optional (544,514) RS-FEC and PMA adaptation hardware design example.

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