E-tile Hard IP Intel® Agilex™ Design Example User Guide: Ethernet, E-tile CPRI PHY and Dynamic Reconfiguration

ID 683860
Date 12/11/2021
Public

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4.5.4. 100GE DR Hardware Design Examples

This section describes high-level flow guidelines for the E-tile reconfigurable Ethernet core.

You can follow these steps to configure the E-tile reconfigurable Ethernet IP core:
  1. Create a hardware project.
    • Instantiate the E-Tile Dynamic Reconfiguration Design Example for 100G Ethernet protocol.
    • Configure the IP parameters and generate design in the Intel® Quartus® Prime.
  2. Reconfigure the hardware project as needed during the run time.
    • Define next configuration by programing CSR registers.
    • Trigger the reconfiguration. Both variants, four 25G and one 100G Ethernet, are supported.
    • Repeat step 2.

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