E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

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2.9.9. Ethernet Adaptation Flow with PTP or with External AIB Clocking

This adaptation flow applies to single and multilane 10GE/25GE variants.

Refer to Loading a PMA Configuration and PMA Registers 0x200 to 0x203 Usage sections in the E-tile Transceiver PHY User Guide for more details on the adaptation flow and how to get started.

This adaptation flow assumes a valid Ethernet traffic.

  1. Assert i_sl_tx_rst_n/soft_tx_rst and i_sl_rx_rst_n/soft_rx_rst signals.
  2. Trigger PMA analog reset. 14
  3. Reload PMA settings (call the PMA attribute sequencer) using 0x91[0] = 114.
  4. Deassert the i_sl_tx_rst_n/soft_tx_rst signal.
  5. If using a PMA configuration, load the PMA configuration using control status registers (CSR). This is loaded to the registers using PMA registers 0x200 to 0x203 15.
    1. Write 0x40143 = 0x80.
    2. Read 0x40144[0] until it changes to 1.
  6. Enable internal serial loopback 16 and run initial adaptation. Verify that the initial adaptation status is complete using interrupt code 0x0126 and data 0x0B00.
  7. Enable mission mode and disable internal serial loopback (skip this step if using internal serial loopback)16.
  8. Wait for valid data traffic on RX and then proceed to the next step.
  9. Run initial adaptation. Verify that the initial adaptation status is complete using interrupt code 0x0126 and data 0x0B00 (skip this step if using internal serial loopback).
  10. Run continuous adaptation 17.
  11. Deassert the i_sl_rx_rst_n/soft_rx_rst signal.
  12. Optional: Verify that the link status signal rx_aligned transitions high.
  13. Send packets.
14 Refer to PMA Analog Reset section in the E-tile Transceiver PHY User Guide.
15 Refer to Loading a PMA Configuration and PMA Registers 0x200 to 0x203 Usage sections in the E-tile Transceiver PHY User Guide.
16 For how to enable and disable internal serial loopback, refer to 0x0008: Internal Serial Loopback and Reverse Parallel Loopback Control section in the E-tile Transceiver PHY User Guide.
17 During the continuous adaptation, the link partner must keep sending the data. If link goes down, the entire sequence must be repeated.

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