E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

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2.9.4. Auto-Negotiation and Link Training

The E-Tile Hard IP for Ethernet Intel FPGA IP variations with auto-negotiation and link training implement the IEEE Backplane Ethernet Standard 802.3-2012.

The IP core includes the option to implement the following features:

  • Auto-negotiation provides a process to explore coordination with a link partner on a variety of different common features. Turn on the Enable AN/LT and parameter to configure support for auto-negotiation. Turn on the Enable Auto-Negotiation on Reset parameter to enable auto-negotiation by default after reset.
  • Link training provides a process for the IP core to train the link to the data frequency of incoming data while compensating for variations in process, voltage, and temperature. Turn on the Enable AN/LT parameter to configure support for link training. Turn on the Enable Link Training on Reset parameter to enable link training by default after reset. When enabled, link training performs the initial and continuous adaptation. For more details on adaptation modes, refer to the E-Tile Transceiver PHY User Guide.

The E-Tile Hard IP for Ethernet Intel FPGA IP includes separate auto-negotiation and link training modules for each of the 10G/25G channels. For 100G, the IP provides auto-negotiation functionality on a single channel specified by the Auto-Negotiation Master parameter and separate link training modules for each channel.

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