E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

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Document Table of Contents

2.12.5.2. TX SFC Scratch Register

Offset: 0x601

TX SFC Scratch Register Fields

Bit Name Description Access Reset
31:0 scratch

32 bits of scratch register space for testing

RW 0x0

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