E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.4. Resource Utilization

The resources for the E-Tile CPRI PHY IP core were obtained from the Intel® Quartus® Prime Pro Edition software version 20.1
Table 83.  Resource Utilization for Intel® Stratix® 10 Devices
CPRI Line Bit Rate (With number of channel1) Enable Native PHY Debug Master Endpoint Parameter ALMs ALUTs Dedicated Logic Registers Memory 20K
24.33024 Gbps with RS-FEC On 2,382 3,203 3,645 6
24 Gbps without RS-FEC On 2,246 3,050 3,402 6
12.1651 Gbps with RS-FEC On 2,389 3,195 3,647 6
12.1651 Gbps without RS-FEC On 2,247 3,052 3,411 6
10.1376 Gbps with RS-FEC On 2,393 3,197 3,657 6
10.1376 Gbps without RS-FEC On 2,254 3,078 3,400 6
9.8304 Gbps On 2,768 3,782 4,680 6
6.144 Gbps On 2,764 3,781 4,768 6
4.9152 Gbps On 2,781 3,796 4,699 6
3.0720 Gbps On 3,774 3,787 4,725 6
2.4376 Gbps On 2,771 3,819 4,694 6
Table 84.  Resource Utilization for Intel® Agilex™ Devices
CPRI Line Bit Rate (With number of channel1) Enable Native PHY Debug Master Endpoint Parameter ALMs ALUTs Dedicated Logic Registers Memory 20K
24.33024 Gbps with RS-FEC On 2,421 3,216 3,705 6
24 Gbps without RS-FEC On 2,271 3,104 3,445 6
12.1651 Gbps with RS-FEC On 2,395 3,180 3,639 6
12.1651 Gbps without RS-FEC On 2,251 3,081 3,457 6
10.1376 Gbps with RS-FEC On 2,397 3,192 3,658 6
10.1376 Gbps without RS-FEC On 2,254 3,082 3,405 6
9.8304 Gbps On 3,769 3,807 4,716 6
6.144 Gbps On 2,772 3,788 4,709 6
4.9152 Gbps On 2,801 3,786 4,715 6
3.0720 Gbps On 2,772 3,793 4,748 6
2.4376 Gbps On 2,747 3,788 4,673 6