E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

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2.12.5.8. Enable TX XOFF

Offset: 0x60A

Enable TX XOFF Fields

Bit Name Description Access Reset
2:0 en_xoff_qnum_sel Enable XOFF

Activates automatic TX response to XOFF requests from the link partner n standard flow control mode,

1=EHIP responds to XO

FF requests it receives by stopping the flow of TX data
  • After power on, this register defaults to 0
  • After i_csr_rst_n, this register is set to the value based on the module parameter flow_control
RW 0x0

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