E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

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Document Table of Contents

2.12.1.11. Auto Negotiation Status Register 2

Offset: 0xC8

Auto Negotiation Status Register 2 Fields

Bit Name Description Access Reset
31:0 lp_base_page_high Link Partner Base Page (upper bits) [

[31:30] = Link partner FEC bits

[29:5] = Link partner Technology Ability bits

[4:0] = TX Nonce bits

RO 0x0

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