High Bandwidth Memory (HBM2) Interface Intel® FPGA IP User Guide

ID 683189
Date 1/20/2023

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6.5.4. Power Down Status

To invoke the Power Down mode in the HBM2 controller, enable the Power Down Enable Mode option in the parameter editor when generating the HBM2 IP.

To read the Power Down Enable status, issue a Read command to APB Address 16’h0008. APB Read data provides HBM2 Power Down status information as shown in the following table.

Table 37.  APB Power Down Status Information
Read Data Bit Definition Description
[0] Power Down status.
  • 1’b1 – HBM Channel is in Power Down mode.
  • 1’b0 – HBM Channel is not in Power Down mode.
[15:1] Reserved.