High Bandwidth Memory (HBM2) Interface Intel® FPGA IP User Guide

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ID 683189
Date 9/27/2021
Public
Document Table of Contents

4. Creating and Parameterizing the High Bandwidth Memory (HBM2) Interface Intel® FPGA IP

This chapter contains information on project creation, IP parameter descriptions, and pin planning for your High Bandwidth Memory (HBM2) Interface Intel® FPGA IP.

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