High Bandwidth Memory (HBM2) Interface Intel® FPGA IP User Guide

ID 683189
Date 9/27/2021
Public
Document Table of Contents

5.3. Simulating High Bandwidth Memory (HBM2) Interface Intel® FPGA IP with Synopsys VCS*

  1. Navigate to the project_directory/hbm_0_example_design/sim/ed_sim/sim/synopsys/vcs directory.
  2. To run the simulation, type sh vcs_setup.sh. To view the simulation results, write the output to a log file. The simulation log provides efficiency data and other useful information.
  3. To view the waveform, add +vcs+dumpvars+test.vcd to the vcs command.
  4. To view the waveform, type dve & to launch the waveform viewer. Add the necessary signals or module to the waveform view to view the required signals.

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