Visible to Intel only — GUID: bhc1440732171720
Ixiasoft
Visible to Intel only — GUID: bhc1440732171720
Ixiasoft
1.4. Presets
The parameter values chosen for the presets belong to the group of supported JESD204B IP configurations for design example generation. You can select one of the presets available for your target device to quickly generate a design example without having to manually set each parameter in the IP tab and verifying that the parameter matches the supported configurations set. There are two preset settings available in the library:
- RTL State Machine Control example design
- Nios II Control example design
JESD204B IP Parameters | Presets | |
---|---|---|
RTL State Machine Control | Nios II Control | |
Devices Support | V series and Arria 10 | Arria 10 |
L | 2 | 2 |
M | 2 | 2 |
F | 2 | 2 |
K | 16 | 16 |
S | 1 | 1 |
Wrapper Options | Both Base and Phy | Both Base and Phy |
Data Path | Duplex | Duplex |
JESD204B Subclass | 1 | 1 |
Data Rate | 6144 | 6144 |
PCS Option | Enabled Hard PCS | Enabled Hard PCS |
PLL Type | CMU | CMU |
Bonding Mode | Bonded | Non-bonded |
Enable Transceiver Dynamic Reconfiguration | Yes | Yes |
PLL/CDR Reference Clock Frequency | 153.6 | 153.6 |
Enable Bit Reversal And Byte Reversal | No | No |
N | 16 | 16 |
N’ | 16 | 16 |
CS | 0 | 0 |
CF | 0 | 0 |
High Density User Data Format (HD) | 0 | 0 |
Enable scramble (SCR) | Yes | Yes |
Enable Error Code Correction (ECC_EN) | Yes | Yes |
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