JESD204B Intel® FPGA IP Design Example User Guide: Intel® Quartus® Prime Standard Edition

ID 683094
Date 10/31/2022
Document Table of Contents

1.6.5. Generating and Simulating the Design Example

To use the JESD204B IP core design example testbench, follow these steps:

  1. Generate the design example simulation testbench. Refer to Generating the Design Example Simulation Model
  2. Simulate the design example using simulator-specific scripts. Refer to Simulating the JESD204B IP Core Design Example