JESD204B Intel® FPGA IP Design Example User Guide: Intel® Quartus® Prime Standard Edition

ID 683094
Date 10/31/2022
Document Table of Contents

1.7.3. Nios II Processor Design Example Files

The design example is stored in the <your project> /ed_nios file directory. For the design example with Nios II processor control unit, only the synthesis flow is available; simulation flow is not available.

Table 40.  Design Example FilesThis table lists the important folders and files in the ed_nios file directory.

File Type



Quartus project files


Quartus project file.


Quartus settings file.
output_files Folder containing output files from Quartus compilation (for example, reports or sof)
Verilog HDL design files

Top level HDL.


Synopsys Design Constraints (SDC) file containing all timing/placement constraints.
transport_layer Folder containing assembler and de-assembler HDL.
pattern Folder containing the test pattern generator and checker HDL.
spi_mosi_oe.v Output buffer RTL.
switch_debouncer.v Switch debouncer RTL.
Platform Designer (Standard) Projects


Top level Platform Designer (Standard) system project.


JESD204B subsystem (refer to related information)
se_outbuf_1bit.qsys Output buffer module.
se_outbuf_1bit Folder containing the output buffer module.


Nios II subsystem (refer to related information)
jesd204b_ed_qsys Folder containing generated HDL files from jesd204b_ed_qsys.qsys.
*.sopcinfo Files containing system information for software project building (refer to related information) .
Software files software

Folder containing all software-related files (detailed description in the Software File Directory table).

There are two folders for the software files:

  • jesd204_nios_ed—contains all user source and header files.
  • jesd204_nios_ed_bsp—board support package (BSP) that contains system files.
Table 41.  Software File Directory

File Type



Header files (in jesd204_nios_ed folder)


Offsets, masks, and bit position definitions for peripherals in Platform Designer (Standard) system that do not have standard access libraries. This includes the following peripherals:

  • JESD204B TX and RX CSR
  • Reset sequencer
  • PIO control
  • PIO status
  • Core PLL reconfiguration


General user parameter definitions.


Contains function prototype definitions of sub-functions in main.c.


Contains function prototype definitions of macro functions in macros.c.
Source files (in jesd204_nios_ed folder)


Main C program. Also contain sub functions.


JESD204B Platform Designer (Standard) system device access macros.

System files (in jesd204_nios_ed_bsp folder)


BSP-generated header file containing Platform Designer (Standard) system-specific parameters such as:
  • Peripheral base addresses
  • Interrupt controller IDs
  • IRQ priorities
Attention: Do not edit this auto-generated header file.