Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

16.4.3.1.5. Polling the CCS

CE‑ATA card devices generate the CCS to notify the host controller of the normal ATA command completion or ATA command termination. After receiving the response from the card, the command path state machine performs the functions illustrated in the following figure according to cmd register bit values.
Figure 47. CE‑ATA Command Path State Machine

The above figure illustrates:

  • Response end bit state—The state machine receives the end bit of the response from the card device. If the ccs_expected bit of the cmd register is set to 1, the state machine enters the wait CCS state.
  • Wait CCS—The state machine waits for the CCS from the CE‑ATA card device. While waiting for the CCS, the following events can happen:
    1. Software sets the send CCSD bit (send_ccsd) in the ctrl register, indicating not to wait for CCS and to send the CCSD pattern on the command line.
    2. Receive the CCS on the CMD line.
  • Send CCSD command—Sends the CCSD pattern (0b00001) on the CMD line.