Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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10.4.7. ECC Controller Initialization and Configuration

You can initialize memory and run ECC diagnostics when the ECC register interface is out of reset and idle or when the IP is in reset. Peripherals that access memories with ECC enabled must run hardware initialization prior to using the peripheral memory.
Note: Software must not perform read or write accesses to memory during hardware initialization.
The steps for initializing and configuring an ECC controller are as follows:
  1. Turn off ECC interrupts by setting interrupt masks in the ecc_intmask_set register in the System Manager and disabling interrupts in the ERRINTEN register of the ECC Controller.
  2. Ensure the ECC detection and correction logic is disabled by clearing the ECC_EN bit in the CTRL register.
  3. Enable memory initialization through the ECC controller's memory initialization block by setting the INITx bit in the CTRL register. If the memory is dual-ported, initialization must be performed on both ports. Refer to the ECC Structure section to identify what type of memory you are initializing.
  4. When the INITCOMPLETEx bit in the INITSTAT register is set, configure any single-bit, count, or compare match interrupts that are required. Enable ECC interrupts in the ECC controller and System Manager. Refer to the ECC Controller Interrupts section and the System Manager chapter for information on enabling interrupts.

After these steps are complete, normal accesses can occur.

When an ECC controller is enabled:

  • The ECC controller writes the ECC bits whenever data is written to the RAM.
  • Error interrupt requests can be enabled in the Interrupt Mode (INTMODE) register.
  • Data errors are detected and correction is attempted.

The ECC calculation can only be performed when there is a valid RAM access.