Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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Document Table of Contents

15.5.1.2. Device Initialization Sequence

At initialization, the host software must program the following registers in the config group:
  • Set the devices_connected register to 1.
  • Set the device_width register to 8.
  • Set the device_main_area_size register to the appropriate value.
  • Set the device_spare_area_size register to the appropriate value.
  • Set the pages_per_block register according to the parameters of the flash device.
  • Set the number_of_planes register according to the parameters of the flash device.
  • If the device allows two ROW address cycles, the flag bit of the two_row_addr_cycles register must be set to 1. The host program can ensure this condition either of the following ways:
    • Set the flag bit of the bootstrap_two_row_addr_cycles register to 1 prior to the NAND flash controller’s reset initialization sequence, causing the flash controller to initialize the bit automatically.
    • Set the flag bit of the two_row_addr_cycles register directly to 1.
  • Clear the chip_enable_dont_care register in the config group to 0.

The NAND flash controller can identify the flash device features, allowing you to initialize the flash controller registers to interface correctly with the device, as described in Discovery and Initialization.

However, a few NAND devices do not follow any universally accepted identification protocol. If connected to such a device, the NAND flash controller cannot identify it correctly. If you are using such a device, your software must use other means to ensure that the initialization registers are set up correctly.