Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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19.4.9.2. Taking the SPI Controller Out of Reset

When a cold or warm reset is issued in the HPS, the reset manager resets this module and holds it in reset until software releases it.

After the Cortex*-A53 MPCore™ boots, it can deassert the reset signal by clearing the appropriate bits in the reset manager's corresponding reset register. For more information about reset registers, refer to the "Reset Manager" section.