Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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10.4.4.4. Memory Testing

You can perform all memory diagnostic testing through the register slave interface. Additionally, the DMA can also be tested through the peripheral slave interface. You can run ECC diagnostics when the ECC register interface is out of reset and idle or when the peripheral is in reset

Each peripheral with ECC RAM has two separate reset control bits. One bit controls the peripheral reset and one bit controls the peripheral's ECC register interface reset.

It is recommended to run ECC diagnostics of peripheral memories that are indirectly addressable before operating the peripheral in functional mode. Diagnostics can only be run if the peripheral ECC register interface is out of reset but idle or if the peripheral itself is in reset. The peripheral ECC register interface is out of reset and idle when:
  • The peripheral's *ocp bit in the per0modrst register of the Reset Manager is clear
  • The ECC_EN bit in the CTRL register of the peripheral's ECC register set is clear

When the ECC diagnostics have completed, software can bring the ECC register interface out of reset if it is still in reset and configure the ECC registers.