Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.2.9.7. Error Checking and Correction Controller

ECC controllers provide single- and double-bit error memory protection for integrated on-chip RAM and peripheral RAMs within the HPS.

The following peripherals have integrated ECC-protected memories:
  • USB OTG controllers
  • SD/MMC controller
  • EMAC controllers
  • DMA controller
  • NAND flash controller
  • On-chip RAM
Features of the ECC controller:
  • Single-bit error detection and correction
  • Double-bit error detection
  • Interrupts generated on single- and double-bit errors