Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

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18.6.2.1. Host Initialization

After power up, the USB port is in its default mode. No VBUS is applied to the USB cable. The following process sets up the USB OTG controller as a USB host.

  1. To enable power to the USB port, the software driver sets the Port Power (prtpwr) bit to 1 in the Host Port Control and Status Register (hprt) of the Host Mode Registers (hostgrp) group. This action drives the VBUS signal on the USB link.

    The controller waits for a connection to be detected on the USB link.

  2. When a USB device connects, an interrupt is generated. The Port Connect Detected (PrtConnDet ) bit in hprt is set to 1.
  3. Upon detecting a port connection, the software driver initiates a port reset by setting the Port Reset (prtrst) bit to 1 in hprt.
  4. The software driver must wait a minimum of 10 ms so that speed enumeration can complete on the USB link.
  5. After the 10 ms, the software driver sets prtrst back to 0 to release the port reset.
  6. The USB OTG controller generates an interrupt. The Port Enable Disable Change (prtenchng) and Port Speed (prtspd) bits, in hprt, are set to reflect the enumerated speed of the device that attached.

    At this point the port is enabled for communication. Keep alive or SOF packets are sent on the port. If a USB 2.0‑capable device fails to initialize correctly, it is reported as a USB 1.1 device.

    The Host Frame Interval Register (hfir) is updated with the corresponding PHY clock settings. The hfir, used for sending SOF packets, is in the Host Mode Registers (host grp) group.

  7. The software driver must program the following registers in the Global Registers (globgrp) group, in the order listed:
    1. Receive FIFO Size Register (grxfsiz)—selects the size of the receive FIFO buffer
    2. Non‑periodic Transmit FIFO Size Register (gnptxfsiz)—selects the size and the start address of the non‑periodic transmit FIFO buffer for nonperiodic transactions
    3. Host Periodic Transmit FIFO Size Register (hptxfsiz)—selects the size and start address of the periodic transmit FIFO buffer for periodic transactions
  8. System software initializes and enables at least one channel to communicate with the USB device.