Intel® Agilex™ Hard Processor System Technical Reference Manual

ID 683567
Date 11/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.1.2. Secure Transaction Protection

The system interconnect provides two levels of secure transaction protection:

  • Security firewalls ( ARM® TrustZone compliant)—Enforce secure read and write transactions.
  • Privilege filter—Leverages the firewall mechanism and provides additional security by filtering the privilege level of L4 slave transactions. The privilege filter applies to writes only.

All slaves on the SoC are placed behind a security firewall. A subset of slaves are also placed behind a privilege filter. Transactions to these slaves must pass both a security firewall and the privilege filter to reach the slave.