Stratix V Avalon-ST Interface with SR-IOV PCIe Solutions: User Guide

ID 683488
Date 5/02/2016
Public
Document Table of Contents

11.1.2. Using the PIPE Interface for Gen1 and Gen2 Variants

Running the simulation in PIPE mode reduces simulation time and provides greater visibility.

Complete the following steps to simulate using the PIPE interface:

  1. Go to the directory, <testbench_dir>/pcie_ed_tb/ip/pcie_ed_tb/DUT_pcie_tb_ip/sim/
  2. Open DUT_pcie_tb_ip.v.
  3. Search for the string, serial_sim_hwtcl. Set the value of this parameter to 0 if it is 1.
  4. Save DUT_pcie_tb_ip.v.

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