Stratix V Avalon-ST Interface with SR-IOV PCIe Solutions: User Guide

ID 683488
Date 5/02/2016
Public
Document Table of Contents

1.4. Design Examples for SR-IOV

Intel provides example designs to familiarize you with the available functionality. Each design connects the device under test (DUT) to an application programming platform (APP)]. You can download design examples from the <install_dir>/ ip/altera/altera_pcie/altera_pcie_sriov/example_design/ directory.

When you click the Example Design button in the Parameter Editor, you are prompted to specify the design example location. After design example generation completes, this directory contains one or two example designs. One is the example design from the <install_dir> that best matches the current parameter settings. This example design provides a static DUT. The other example design is a customized example design that matches your parameter settings exactly. Starting in the Quartus II software v15.0, this feature is available for most but not all IP core variations. If this feature is not available for your particular parameter settings, the Parameter Editor displays a warning.

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