Stratix V Avalon-ST Interface with SR-IOV PCIe Solutions: User Guide

ID 683488
Date 5/02/2016
Public
Document Table of Contents

5.15.6. Page Size Registers

Table 79.  Supported Page Size Register - 0x25C

Bits

Register Description

Default Value

Access

[31:0]

Supported Page Sizes. Specifies the page sizes supported by the device

Set in Platform Designer

RO

Table 80.  System Page Size Register - 0x260

Bits

Register Description

Default Value

Access

[31:0]

Supported Page Sizes. Specifies the page size currently in use.

Set in Platform Designer

RO

Did you find the information on this page useful?

Characters remaining:

Feedback Message