6.1. Setting Up and Verifying MSI Interrupts
- Disable legacy interrupts by setting Interrupt Disable bit of the Command register using a Configuration Write Request. The Interrupt Disable bit is bit 10 of the Command register.
- Enable MSI interrupts by setting the MSI enable of the MSI Control register using a Configuration Write Request. The MSI enable is bit 16 of 0x050.
- Set up the MSI Address and MSI Data using a Configuration Write Request.
- Specify the number of MSI vectors in the Multiple Message Enable field of the MSI Control register using Configuration Write Request.
- Unmask the bits associated with MSI vectors in the previous step register using Configuration Write Request..
- Send MSI requests via the app_msi* interface.
- Verify that app_msi_status[1:0]=0 when app_msi_ack=1.
- Expect a Memory Write TLP request with the address and data matching those previously specified.
You can build on this procedure to verify that the Message TLP is dropped and app_msi_status = 0x2 if either of the following conditions are true:
- The MSI capability is present, but the MSI enable bit is not set.
- The MSI capability is disabled, but the application sends an MSI request.
Did you find the information on this page useful?