H-tile Ethernet Hard IP User Guide: For Intel® Stratix® 10 Devices

ID 683430
Date 2/16/2022
Document Table of Contents

B.2.14. BER Count

Offset: 0x32A

ber_count Fields

Bit Name Description Access Reset
31:0 count BER Count
  • 32b count that increments each time the BER_BAS_SH state is entered
  • Rolls over when maximum count is reached
  • Clears when the channel is reset
  • Can be captured using snapshot or RX shadow request
RO 0x0

Did you find the information on this page useful?

Characters remaining:

Feedback Message