H-tile Ethernet Hard IP User Guide: For Intel® Stratix® 10 Devices

ID 683430
Date 2/16/2022
Public
Document Table of Contents

B.5.31. PFC Holdoff Quanta 6

PFC Holdoff Quanta 6

16b value specifying the holdoff time before XOFF is retransmitted when the corresponding Enable Automatic TX Pause Retransmission register value bit is 1

Offset: 0x62E

Access: RW

PFC Holdoff Quanta 6 Fields

Bit Name Description Access Reset
15:0 holdoff_quanta PFC Holdoff Quanta
16b value specifying holdoff time before another XOFF is transmitted when the corresponding Enable Automatic TX Pause Retransmission register value bit is 1
  • Times are programmed in holdoff quanta
    • For 100G links, 1 Holdoff Quanta = 2 clock cycles
  • Min value is 1, but to minimize wasted bandwidth, holdoff should be set as large as possible without exceeding the recommended max value
  • Max value for correct operation where holdoff retransmits PFC requests before the previously transmitted Quanta expires is:
    • For 100Gx4 links: corresponding pause/pfc quanta - (50 + Maximum TX Frame Size register value/32)
  • After power-on, holdoff_quanta defaults to 16'hFFFF
  • After i_cfg_rst_n, holdoff_quanta defaults to the value in the module parameter holdoff_quanta for pause, and pfc_holdoff_quanta_n for PFC
RW 0xFFFF

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