DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/26/2023

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4.3.3. Using Rounding and Saturation in DSP Builder Advanced Blockset Designs

IP library blocks such as FIR filters produce output data that use full resolution. DSP Builder performs no rounding or saturation on the output data.


  1. Use a Scale block to provide scaling and control your bit growth before data enters the next stage of your IP or primitive subsystems.
    Note: For primitive subsystems, use a Convert block to apply rounding and saturation. The Convert block does not perform scaling.
  2. To reduce bit width of a wide word, use a Convert block instead of just forcing output data type in an arithmetic block.

    Whether you choose the Scale block or Convert block to perform rounding and saturation, depends on your algorithm and resource requirement. The Convert block does not support scaling, although you can combine a few Primitive library blocks to implementing scaling. The Scale block allows you to use a different scaling factor on a cycle basis. It supports both amplification and attenuation of data.