3.7.1. DSP Builder Menu Options
|Create new design||New Model Wizard||Create a new model from a simple template.|
|Verification||Design Checker||Verify your design against basic design rules.|
|Verify Design||Verify the Simulink simulation matches ModelSim simulations of the generated hardware by batch running the automatically generated testbenches.|
|Parameterization||Avalon Interfaces …||Configure the memory mapped interface.|
|Generated hardware details||Resource Usage …||View resource estimates of the generated hardware.|
|Memory Map…||View the generated memory map interface.|
|Run other software tools||Run Quartus Prime Software||Run a Quartus Prime project for the generated hardware.|
|Run RTL Simulation||Verify the Simulink simulation matches ModelSim simulation of the generated hardware by running an automatically generated testbench in an open ModelSim window.|
|Generate and Run Fast Simulation||
Fast simulation provides significantly faster simulation of your design. It creates a copy of your design and then dynamically generates and compiles a software model. You must have the makefile tool cmake available and you must provide the paths to C and C++ compilers. For background information on Software Models, refer to Verifying your DSP Builder Design with C++ Software Models.
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