DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/26/2023
Public

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15.4.26. Fanout

The Fanout block behaves like a wire, connecting its single input to one or more outputs. The Fanout and VectorFanout are similar blocks.

The number of outputs is one of the parameters of the Fanout block. Use a Fanout block instead of a simple wire to provide a hint to DSP Builder that the wire is expected to be long. DSP Builder might ignore the hint (which amounts to implementing the Fanout block using a simple wire), or might insert one or more additional registers on the wire to improve the physical routing of the design. The number of registers it inserts depends on the target device, target fMAX and other properties of your design. Inserting a Fanout block does not change the behavior of your design. If DSP Builder chooses to insert extra registers, it automatically adjusts the latency of any parallel paths to preserve the original wire-like behaviour. By default, DSP Builder implements all Fanout blocks as simple wires on non-HyperFlex devices. FFTs and FIRs (which both contain embedded Fanout blocks) retain the same QoR characteristics as in DSP Builder v15.0 and earlier (which has no Fanout blocks). To enable DSP Builder to choose different implementations for the Fanout blocks in your design, specify DSPBA_Features.EnableFanoutBlocks = true; at the MATLAB command line. This command increases the number of registers your design uses, but potentially increases its fMAX. You can specify that DSP Builder doesn't need to initialize any registers that it chooses to insert. Then DSP Builder inserts hyper-registers (instead of ordinary, ALM registers) on devices that support the HyperFlex architecture. You should use this option for datapaths where the initial value is unimportant, but you should avoid using it for control paths.

Table 195.  Parameters for the Fanout Block
Parameter Type Description
Number of outputs Integer > 1 Number of output ports
Uninitialized Check box Specifies whether DSP Builder can use hyper registers.

When you apply automatic reset minimization, turn off Uninitialized, which allows reset minimization to choose the correct behavior automatically.

Turning on Uninitialized forces no reset.

Table 196.  Port Interface for the Fanout Block
Signal Direction Type Description
d Input Any Input
q0, q1, q2, etc Output Same as d. Copy of d.