15.5.2. Channel Out (ChannelOut)
The ChannelOut block passes its input through to the outputs unchanged, with types preserved. This block indicates to DSP Builder that these signals must synchronize with each other.
When you run a simulation in Simulink, DSP Builder adds additional latency from the balanced pipelining stages to meet the specified timing constraints for your model. The block accounts for this additional latency. This latency does not include any delay that you explicitly add to your model, by for example a SampleDelay block. DSP Builder only includes latency due to any pipelining that it added to achieve timing closure.
|Number of data signals||Specifies the number of data signals on this block.|
|Signal||Direction||Type||Description||Vector Data Support||Complex Data Support|
|v||Input||Boolean||Valid output signal||No||No|
|c||Input||8-bit unsigned integer||Channel output signal||No||No|
|d0, d1, d2, ...||Input||Any fixed-or floating-point type||A number of output data signals||Yes||Yes|
|c||Output||8-bit unsigned integer||Channel signal||No||No|
|q0, q1, q2, ...||Output||Any fixed-or floating-point type||A number of data signals||Yes||Yes|