6.2. Simulating the IP Design in Simulink
Create an IP design.
- In the demo_firi window, click Start > Simulation .
MATLAB generates output HDL for the design.
- Click DSP Builder Resource Usage Design.
You can view the resources of the whole design and the subsystems.
- Click Close.
- Double click the FilterSystem subsystsem, right-click on the filter1 InterpolatingFIR block, and click Help.
After simulation, DSP Builder updates this help to include the following information:
- The latency of the filter
- The port interface
- The input and output data format
- The memory interface for the coefficients.
- To display the latency of the filter on the schematic, right-click on InterpolatingFIR block and click Block Properties.
- On the Block Annotation tab, in block property tokens double-click on %<latency>.
- In Enter text and tokens for annotation, type Latency = before %<latency>. Click OK.
DSP Builder shows the latency beneath the block.
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