7.4.14. Interpolating FIR Filter with Updating Coefficient Banks
Write to the bus interface using the BusStimulus block with a sample rate proportionate with the bus clock. Generally, DSP Builder does not guarantee bus interface transactions to be cycle accurate in Simulink simulations. However, in this design example, DSP Builder updates the coefficient bank while it is not in use.
The model name is demo_firi_updatecoeff.mdl.