You can place the LocalThreshold block anywhere in your design to define over-ride values for the margin and threshold settings for that subsystem and any embedded subsystems. You can over-ride these values further down in the hierarchy by implementing more LocalThreshold blocks.
For example, you can specify different clock margins for different regions of your design.
|Clock margin (MHz)||Specifies the margin to influence the tradeoff between performance and resources.. The specified margin does not affect the folding options because the system runs at the rate specified by the Clock frequency parameter setting. Specify a positive clock margin if you need to pipeline your design more aggressively (or specify a negative clock margin to save resources) when you do not want to change the ratio between the clock speed and the bus speed.|
|Small memory minimum fill||This threshold controls whether registers or small memories (MLABs) implement delay lines. DSP Builder uses a small memory only if it fills it with at least the threshold number of bits. On device families that don't support small memories, DSP Builder ignores this threshold.|
|Medium memory minimum fill||This threshold controls when the design uses a medium memory (M9K, M10K or M20K) in place of a small memory or registers. DSP Builder uses the medium memory only if it fills it with at least the threshold number of bits.|
|Large memory minimum fill||This threshold controls whether the design uses a large memory (M144K) instead of multiple medium memories. DSP Builder uses the large memory only when it can fill it with at least the threshold number of bits. Default prevents the design using any M144Ks. On device families that don't support large memories, DSP Builder ignores this threshold.|
|Multiplier: logic and DSP threshold||Specifies the number of logic elements you want to use to save a multiplier. If the estimated cost of implementing a multiplier in logic is no more than this threshold, DSP Builder implements that multiplier in logic. Otherwise DSP Builder uses a hard multiplier. Default means the design always uses hard multipliers.|
|Apply Karatsuba method to complex multiply blocks||Implements this equation: (a+jb) * (c+jd) = (a-b)*(c+d) - a*d + b*c + j(a*d + b*c). DSP Builder includes internal preadder steps into DSP blocks but you see bit growth in the multipliers.|
This block has no inputs or outputs.