3.6.1. Verifying Error Detection Functionality
In user mode, Intel® MAX® 10 devices support the CHANGE_EDREG JTAG instruction, which allows you to write to the 32-bit storage register. You can use .jam to automate the testing and verification process. You can only execute this instruction when the device is in user mode. This instruction enables you to dynamically verify the CRC functionality in-system without having to reconfigure the device. You can then switch to use the CRC circuit to check for real errors induced by an SEU.
- Bring the TAP controller to the RESET state by holding TMS high for five TCK clocks
- Power cycle the device
- Perform these steps:
- After the configuration completes, use CHANGE_EDREG JTAG instruction to shift out the correct precomputed CRC value and load the wrong CRC value to the CRC storage register. When an error is detected, the CRC_ERROR pin is asserted.
- Use CHANGE_EDREG JTAG instruction to shift in the correct precomputed CRC value. The CRC_ERROR pin is de-asserted to show that the error detection CRC circuitry is working.
'EDCRC_ERROR_INJECT ACTION ERROR_INJECT = EXECUTE; DATA DEVICE_DATA; BOOLEAN out; BOOLEAN in = $02040608; 'shift in any wrong CRC value ENDDATA; PROCEDURE EXECUTE USES DEVICE_DATA; BOOLEAN X = 0; DRSTOP IDLE; IRSTOP IDLE; STATE IDLE; IRSCAN 10, $015; 'shift in CHANGE_EDREG instruction WAIT IDLE, 10 CYCLES, 1 USEC, IDLE; DRSCAN 32, in[31..0], CAPTURE out[31..0]; WAIT IDLE, 10 CYCLES, 50 USEC, IDLE; PRINT " "; PRINT "Data read out from the Storage Register: "out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out, out; 'Read out correct precomputed CRC value PRINT " "; STATE IDLE; EXIT 0; ENDPROC;
You can run the .jam file using quartus_jli executable with the following command line:quartus_jli -c<cable index> -a<action name> <filename>.jam
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